HEAT-UP OF A SILICON WAFER BATCH IN A PRE-HEATED FURNACE

By: Stefan Poscher, Fraunhofer IIS-B, Erlangen, Germany,

Date: 1998

PHOENICS version: Phoenics-CVD 2.1.3

Description :

In this study we investigated the heat-up of a batch of 10 silicon wafers (diameter 300mm, spacing 25mm). The wafer batch is loaded at room temperature into a vertical furnace which has been pre-heated to 600C. During the first 225s after loading the wafers heat up to 600C. The water-cooled bottom flange of the furnace remains at room temperature. During the heating-up temperature gradients appear at the wafers. Additional simulations were executed with 20 and 30 wafers for the same batch length.

Details :

• transient 2D-heat conduction in solids and gas phase is considered.
• Surface-to-surface radiation is considered.
• Semi-transparence of silicon is considered.
• Temperature-dependence of optical properties of the surfaces is considered by updating the radiation-exchange matrix after each 10 time steps.

	Center temperature and temperature difference at the middle wafer for various wafer numbers.